A resistive memory array can be utilized to perform analog computations that exploit the fundamental relationship between row voltage and column current in a resistive mesh to realize an analog multiply-accumulate unit. Such a unit may be faster than a digital computation, and may also consume significantly lower energy than traditional digital functional units. The memory array is typically organized as a grid of cells interconnected by horizontal and vertical wires, referred to as word/row lines and bit/column lines. The fundamental relationship between a row access voltage and a resulting bit line current can act as an analog multiplier of row voltage and memory array cell conductance. Instead of accessing a single row as performed for loading and storing data, multiple rows can be activated concurrently according to an input voltage vector.